1. Field of the Invention
The present invention relates to integrated circuit design and fabrication. More specifically, the present invention relates to a method and an apparatus to determine if a pattern is robustly manufacturable.
2. Related Art
The dramatic improvements in semiconductor integration densities have largely been achieved through corresponding improvements in semiconductor manufacturing technologies.
Semiconductor manufacturing technologies typically include a number of processes which involve complex physical and chemical interactions. Since it is almost impossible to perfectly control these complex interactions, semiconductor manufacturing processes typically have process variations that can cause the manufactured patterns to be different from the design intent. If this difference is too large, it can lead to manufacturing problems which can reduce the yield and/or reduce the performance of the integrated circuit. Hence, to be economically viable, a pattern has to be robust with respect to process variations, i.e., it must be able to tolerate a large enough range of process variations.
Improving the process window directly results in cost savings. This is because improving the process window can substantially increase the throughput by reducing the amount of time spent on inspection, servicing, and maintenance of the equipment. In addition, the actual process conditions encountered during manufacturing may vary due to a variety of reasons. For example, topographical variations on the wafer can occur due to imperfections in the chemical-mechanical polishing process step. As a result, improving the process window can increase the yield for chips that are manufactured in the presence of these process variations.
Unfortunately, improving process window can be very challenging, especially at deep submicron dimensions. To improve the manufacturability of integrated circuits, designers typically use design rule tables that specify what size and shapes of features may be drawn in a design without adversely affecting its manufacturability. Unfortunately, at deep submicron dimensions, design rule tables can easily become unmanageably large. Moreover, design rule tables can be overly restrictive which can prevent designers from being able to achieve the best device performance.
Subtle manufacturing problems may not be identified until at a very late stage in the design and fabrication flow which can substantially increase project costs. Hence, it is highly desirable to identify subtle manufacturing problems as early as possible so that these problems can be fixed without substantially increasing costs.